Power hardware-in-the-Loop (PHIL) simulation is not plug-and-play. Stability and accuracy issues must be well investigated before concluding anything from the simulation result. This paper describes a simulation based pre-evaluation sequence which has been followed in performing a PHIL simulation for a notional electric ship study. In the pre-evaluation, it is found that the interface time delay causes large error in the ship bus power. A compensation method is then proposed and applied to the final PHIL simulation to improve the accuracy.
W. Ren, M. Steurer and S. Woodruff, "Applying Controller and Power Hardware-in-the-Loop Simulation in Designing and Prototyping Apparatuses for Future All Electric Ship," 2007 IEEE Electric Ship Technologies Symposium, Arlington, VA, 2007, pp. 443-448, doi: 10.1109/ESTS.2007.372124.
KEYWORDS: Power Hardware-in-the-Loop simulation, PHIL, all electric ship