In 2015-2016, a fixed series capacitor (FSC) installation in Australia became ready for commissioning. This was part of a plan to increase the transmission capacity of a 275kV interconnector line between two provinces in Australia. Design and planning studies had identified concerns such as possible sub-synchronous oscillations in one of the interconnected areas as a result of this modification in the network. In order to prevent such issues from occurring or to clear them by appropriate actions, additional protective relays were added to the line protection scheme and necessary strategies were included in the FSC control system.
As part of the controller factory acceptance test (FAT) stage, real-time hardware-in-the-loop (HIL) simulations were carried out using RTDS. That allowed for verifying the performance of the FSC controller. The settings selected for the line protective relays were also examined in that manner through simulating several fault scenarios.
In this presentation, the procedure followed in those tests will be outlined and the aspects that needed to be considered in the HIL simulations will be explained.
Farid Mosallat, Manitoba HVDC Research Centre