This paper deals with the HVDC protection system philosophy briefly and presents the HVDC protections, which are exclusive for HVDC system. This paper also describes the typical point to point Bi-Pole HVDC link protections implementation on a Hybrid Hardware consisting of high speed processor & Field Programmable Gate Arrays (FPGA's) based I/O cards. Finally, Testing & Evaluation of the real time performance of the implemented protections using a Real Time Digital Simulator (RTDS), has been explained. The protections system developed has been benchmarked with a ±500kVdc, 2500 MW Line Commutated Converter (LCC) based Bi-pole-HVDC link project. The Hardware-In-Loop (HIL) test results of implemented critical HVDC Protections like Valve short circuit protection, DC line to ground fault protection, Commutation failure prediction & protection are presented. The performance of the developed system has been found to be in agreement with that of the benchmarked Bi-pole HVDC protection system.
K. V. Reddy, N. Dhanunjayudu, S. V. N. J. Sundar and T. T. Reddy, "Implementation and performance evaluation of Bi-Pole HVDC protection system using a real time digital simulator (RTDS)," 2017 7th International Conference on Power Systems (ICPS), Pune, 2017, pp. 99-104, doi: 10.1109/ICPES.2017.8387275.
KEYWORDS: High Voltage Direct Current (HVDC); Protections; Converter Transformer; FPGA; Processor; Hybrid Hardware