This paper presents an FPGA-based Digital Real-Time Simulator (DRTS) platform for Traveling-Wave Relay Testing (TWRT). Traveling-Wave Relays (TWRs) have relatively high sampling rate, as compared to traditional relays, and operate based on the high-frequency response of the power system. Therefore, performing Hardware-In-the-Loop (HIL) tests for a TWR requires i) high resolution, i.e., small simulation time-step and ii) accurate transmission line model to ensure proper replication of traveling waves subsequent to faults. These requirements introduce challenges for DRTS platforms. The envisioned platform in this work comprises an FPGA-based DRTS hosted by a CPU-based platform where the small time-step calculations are conducted by the former. A new state-space realization of the Frequency-Dependent Phase-Domain (FDPD) line model is introduced which enables a fixed hardware design, capable of accommodating its real and imaginary poles. The adopted solution approach enables the parallel solution of the FDPD model and network equations to maximize parallelism and facilitates the use of small time-steps. Performance and accuracy of the proposed DRTS are evaluated and verified against off-line simulation results. The platform is employed for HIL testing of a commercial TWR and the results are reported.
R. Mirzahosseini, R. Iravani, Y. Zhang, IEEE Transactions on Power Deliver, March 2020
KEYWORDS: Traveling-Wave Relay Testing, FPGA, DRTS, Frequency-Dependent Phase-Domain