A hardware-in-the-loop test was designed to demonstrate the frequency support capability of multi-terminal HVDC systems using the experimental facilities at Cardiff University. The experimental test rig consists of a 3-terminal voltage source converter (VSC) test rig, a wind turbine test rig, the RTDS and a grid simulator. The VSC test rig was employed to transfer the power generated from the wind turbine to an AC grid modelled in the RSCAD tool of the RTDS. The experiment results showed good agreement with a PSCAD simulation model.
Daniel Adeuyi • Cardiff University