User Spotlight Series: Week 2
Demonstration of Partially and Fully Selective Protection for Multiterminal HVDC Systems
Abstract: There have been numerous developments towards the protection of VSC-HVDC networks in recent years, however, even as the first networks are brought into operation there are still outstanding questions regarding future protection system design and multivendor interoperability. One of the aims of the PROMOTioN project is to develop and demonstrate HVDC protection systems. This presentation will examine the work performed at The National HVDC Centre, UK, examining an industrial case study system using a simulated HVDC network, DC circuit breaker models and several physical HVDC protection IED prototypes from industrial and academic project partners. The work aims to demonstrate the operation and performance of partially selective and fully selective protection strategies, and will showcase both single vendor and multivendor case studies. Results will be presented demonstrating both the functional performance of the protection IEDs, and the performance of the overall protection system. Details will be provided of the modelling challenges experienced and lessons learnt.
Presenters: Habibur Rahman, National HVDC Centre, UK & Geraint Chaffey, KU Leuven/EngergyVille
Md Habibur Rahman is working as a simulation engineer at the National HVDC Centre, UK. He obtained B.Sc. degree in Electrical and Electronic Engineering from Ahsanullah University of Science and Technology, Bangladesh in 2007. In 2011 he received his M.Sc. degree in Sustainable Electrical Power from Brunel University, UK. Also he is currently pursuing the Ph.D. degree in Electronic and Electrical Engineering at the University of Strathclyde, UK. His research interest is mainly focused on Multi-terminal HVDC system concentrating on fault management, system topology and protection schemes.
Geraint Chaffey received the M.Eng. degree in electrical and electronic engineering from Cardiff University, Cardiff, U.K., in 2012, and the Ph.D. degree from Imperial College London, London, U.K., in 2017. His doctoral thesis was titled “The Impact of Fault Blocking Converters on HVDC Protection.” He is currently a Postdoctoral Researcher with KU Leuven/EnergyVille, where his research is focused on HVDC protection.
Geraint is working in the HVDC protection team at KU Leuven/EnergyVille, where he works towards protection of future HVDC networks, including evaluating the performance of HVDC protection IEDs (aka relays) and the performance of the overall HVDC protection system. Recent work has been examining HVDC protection system performance using protection IEDs in a hardware in the loop real time simulation configuration. Functional test procedures have been developed, and demonstration of system protection is underway. Geraint has a background in HVDC protection and real time simulation for power systems, and contributes to harmonisation in these fields for Cigré, IEEE and IEC.
A Case Study On Comparative Analysis of Traveling Wave Based Protection Methods using RTDS Sub-Step Environment
Abstract: The New York Power Authority (NYPA) is implementing a pilot project for field evaluation of enhanced protection hardware platforms that use traveling wave (TW)-based protection methods and perform comparative analysis with traditional impedance-based methods for fault-clearing and fault-location (FL). Prior to the field deployment, scheduled for 2021, NYPA undertook an internal effort to test and evaluate the performance of such protection schemes in a laboratory environment at its Advanced Grid Innovation Laboratory for Energy (AGILe). Since the TW-based protection algorithms use high-frequency responses at the fault inception point in the power system for FL, highly-detailed, frequency-dependent line models are required to realistically emulate the power system responses using digital simulation. Using the New York State (NYS) real-time grid models developed at the AGILe lab, NYPA leveraged the RTDS modeling capabilities to create multi-conductor, multi-section, frequency-dependent line configurations that accurately model the specific transmission corridor where the relays are expected to be installed and the surrounding area. The detailed model, simulated in the RTDS sub-step environment, was expected to be able to accurately recreate the traveling waves generated at the fault point and their propagation on the line. Subsequently, hardware-in-the-loop testing was performed using this detailed corridor model and the actual protective relays. Rigorous tests were performed to evaluate the accuracy of TW-based protection methods for fault clearing and fault location under various scenarios, such as when double-end measurements are and are not available, under different fault types, as well as using various fault parameters, such as fault-inception angles, and fault locations.
Presenter: Rahul Kadavil – New York Power Authority AGILe
Rahul Kadavil works as a power system engineer with the Advanced Grid Innovation Lab for Energy (AGILe) lab at New York Power Authority since 2019. Prior to that, he was engaged as a research engineer with the Power and Energy Real-Time Laboratory (PERL) at Idaho National Laboratory for performance and integration testing of Hybrid Energy Storage Systems using real-time simulation tools. He designs and tests hardware in the loop experiments to analyze diverse smart technologies and understand how they complement each other. His area of interests includes power systems digital simulation, protection, cyber-physical testbeds and integration of renewable energy resources.
Watch the recorded presentations: