The GTSOC V2 is an optional auxiliary hardware component for the RTDS® Simulator that can be used for several different applications depending on the active firmware. The rack-mountable enclosure houses a powerful FPGA board and system on- a-chip which are capable of high-speed calculations in parallel with the simulation running on the central RTDS Simulator processing hardware.
- Front panel has 16 SFP ports (fibre- or copper-based connections) for various applications
- Rear has 4 fibre ports to connect to the central RTDS Simulator hardware
- Compatible with NovaCor 1.0/2.0 simulation hardware
THE GTSOC V2 AMALGAMATES THE FUNCTIONALITIES PREVIOUSLY PROVIDED BY THE GTSOC V1 AND THE GTFPGA UNIT.
BLACK BOX VENDOR CONTROL MODEL SIMULATION
The GTSOC V2’s black box control capability allows for vendor control models to be integrated into the real-time simulation while protecting the manufacturer’s intellectual property. Using its four ARM processors, the GTSOC V2 runs bare-metal .a static library files containing controller source code in parallel with the real-time simulation.
RTDS Technologies provides a program called the GTSOC Interface Tool which facilitates cross-compilation of source code into the .a format and creates a firmware which can then be run on the GTSOC V2 by the user while preventing access to the code. The controller timestep depends on the quantity and complexity of control library instances running on it.
IEC 61850-9-2/61869-9 SAMPLED VALUES (SV) STREAMING
The GTSOC V2 significantly increases the number of SV data streams that can be input and output from the RTDS Simulator. Each of the 16 swappable fiber or copper ports on the GTSOC V2 can simultaneously publish and subscribe a single SV stream. In total, each GTSOC V2 can publish and subscribe up to 16 independently-configurable SV streams.
When used in the main timestep environment:
- Publishes and subscribes to up to 16 streams at a variety of sampling rates
- Supports a maximum of 24 channels per stream for rates of 80 samples/cycle, 4.8 kHz, 96 samples/cycle
- Supports a maximum of 9 channels per stream for rates of 256 samples/cycle and 14.4 kHz
When used in the substep environment:
- Publish-only capabilities at very high sampling rates
- Supports a maximum of 24 channels for up to 2 streams at 96 kHz
- Supports a maximum of 48 channels for a single stream at 250 kHz
MODULAR MULTILEVEL CONVERTER (MMC) SIMULATION FOR HVDC AND FACTS
The GTSOC V2 can be used to run detailed models of MMC-based HVDC and FACTS and their associated low-level controls. The RSCAD software does include MMC models which run directly on the processor; these models include automatic capacitor voltage balancing control (average value) and are suitable for testing higher-level controls. The GTSOC V2-based models are more detailed, supporting low-level external control testing.
Generic Model (GM)
Represents up to 2 valve legs per GTSOC V2
- Model up to 768 submodules per valve (half, full, or mixed-bridge configurations)
- Considers all possible IGBT firing states
- Supports individual submodule capacitances, customized topologies, internal faults, damping submodule
- Embedded model available (no interface T-line)
Unified Model (U5)
Represents up to 6 valve legs per GTSOC V2
- Model 512 submodules per valve (half or full-bridge configurations)
- Considers blocked, pos. inserted, neg. inserted, and bypassed states
- Supports internal faults and damping submodule
Represents firing controls for up to 3 valve legs per GTSOC V2
- Receives valve current and submodule capacitor voltage from valve models
- Provides firing pulses to valve models via Aurora protocol
FREQUENCY DEPENDENT TRANSMISSION LINE AND CABLE MODELLING
The GTSOC V2 can be used for the dedicated simulation of frequency dependent phase domain transmission lines and cables at a relatively small timestep. In this case the surrounding network, which is simulated in the Substep environment on the central RTDS Simulator processing hardware, is interfaced to the GTSOC V2’s line/cable model via a short Bergeron interface transmission line.
- Models up to 12 coupled conductors (flexible configuration, i.e. 1 line with 12 coupled conductors or 4 lines with 3 coupled conductors each)
- Timesteps in the 1-3 μs range
GENERIC POWER ELECTRONICS SOLVER (GPES) FOR CUSTOM-TOPOLOGY CONVERTERS
The GTSOC V2 provides a flexible platform for modelling custom converter topologies with a reduced simulation timestep. GPES utilizes the L/C modelling approach with Backward Euler integration.
- Timesteps in the 235 ns range
- Each GTSOC V2 supports up to 128 nodes and 256 branches
- Receive firing pulses directly from external controls via Aurora protocol
- Interface GPES circuit to models running on central RTDS Simulator hardware