Power hardware-in-the-loop (PHIL) offers flexible testing of active hardware under rated operating points, using defined scenarios on a real-time simulator. However, PHIL faces stability challenges due to added interface components and their resulting delays.
This presentation introduces PHIL as a key application of real-time simulation, discusses testing active hardware using PHIL, and examines active hardware stability in PHIL tests through the example of an active front end.
Presented by: Nour Hafez, Karlsruher Institut für Technologie